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FPGA Design and Codesign

Hardware-Software Codesign and Prototyping

MATLAB® and Simulink® enable hardware-software codesign by providing C/C++ and HDL code generation. These tools offer flexibility in targeting development board for Xilinx® Zynq All-Programmable System-on-Chip (SoC) devices and Simulink Real-Time™ Turnkey real-time machines, while accelerating functional verification of hardware-software codesigns.

Model and Simulate Your Design in Simulink

With Simulink, you create a system design, including component models that describe the software and hardware subsystems. You can explore design alternatives, create detailed representations, and verify elaborated models. For example, you can discretize a continuous-time model and convert floating-point math operations to fixed-point math operations for hardware implementation.

You can use Fixed-Point Designer™ to help automate the conversion and compare functional results with the original model. When you achieve acceptable results, you can then generate C/C++ and HDL code for your hardware-software codesign implementation.

Automatically Generate C/C++ and HDL Code for Xilinx Zynq SoC Devices

Offering a combination of ARM® Cortex-A9 cores along with the programmable logic of a conventional FPGA, Xilinx Zynq SoC devices require designers to adopt hardware-software codesign methodologies. With Model-Based Design, design teams can simulate models for complete systems and use C/C++ and HDL code generation from Simulink to target Zynq devices.

In this hardware-software workflow, you generate C/C++ with Embedded Coder® for your software model, and can use HDL Coder™ to generate Verilog and VHDL to produce IP cores from your hardware model. Using optimizations provided with the coders, you customize generated code for your target Zynq SoC device. For example, you can use resource sharing and distributed pipelining from HDL Coder to improve the efficiency of your FPGA implementation. Similarly, you can use configuration options and processor-specific optimizations provided with Embedded Coder to improve MCU and DSP execution performance.

Using Embedded Coder and HDL Coder support packages for Zynq, you integrate generated C/C++ and HDL code into your hardware-software codesign implementation, use Xilinx implementation tools for synthesis and place and route, and target your selected Zynq device. Fully automated workflows are available for supported development boards, including ZedBoard and the ZC702 board, and address applications such as motor control, video/image processing, and software-defined radio.

Automatically Generate C/C++ and HDL Code for xPC Target Turnkey

You prototype your hardware-software codesign application on Simulink Real-Time. Using Simulink Real-Time with Simulink Coder and HDL Coder, you can automatically generate C/C++ and HDL code to create an Simulink Real-Time application. Using Simulink Coder, you generate and compile C/C++ code for your software subsystem.

With an Ethernet connection from the host computer to the target computer, you then download the target application. To optimize performance, you can also use Embedded Coder for this step.

Using HDL Coder, you program FPGA boards within xPC Target Turnkey systems. You build reconfigurable I/O or execute high-speed algorithms on an FPGA board connected to a hardware model running in real time with Simulink Real-Time. To automate hardware implementation, HDL Coder provides HDL Workflow Advisor.

After downloading code generated from your software and hardware models, Simulink Real-Time automates the integration of your hardware-software codesign implementation. You can immediately perform your real-time testing and experimentation with the connected I/O.

FPGA Design Trial Software

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Free FPGA Design Information Kit

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Recorded Webinar

FPGA Design for Altera Devices

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