Implement discrete-time lead or lag compensator
The Transfer Fcn Lead or Lag block implements a discrete-time lead or lag compensator of the input. The instantaneous gain of the compensator is one, and the DC gain is equal to (1-z)/(1-p), where z is the zero and p is the pole of the compensator.
The block implements a lead compensator when 0 < z < p < 1, and implements a lag compensator when 0 < p < z < 1.
The Transfer Fcn Lead or Lag block accepts signals of any numeric data type that Simulink® supports, including fixed-point data types.
For more information, see Data Types Supported by Simulink in the Simulink documentation.
Set the pole.
Set the zero.
Set the initial condition for the previous output.
Set the initial condition for the previous input.
Specify the rounding mode for fixed-point operations. For more information, see Rounding. in the Fixed-Point Designer™ documentation.
Select to have overflows saturate to the maximum or minimum value that the data type can represent. Otherwise, overflows wrap.
When you select this check box, saturation applies to every internal operation on the block, not just the output or result. In general, the code generation process can detect when overflow is not possible. In this case, the code generator does not produce saturation code.